Lateral Diffused Metal Oxide Semiconductor Field Effect Transistor (LDMOS) devices are widely used for high breakdown voltage and good thermal performance when compared to other types of transistor devices. An LDMOS device comprises a drain 11, a source 12, a gate 13 and a body 14 as shown in FIG. 1. When turned “ON”, a voltage is applied on the gate 13, a channel region 15 below the gate 13 converts from p-type into n-type, and a current path forms between the drain 11 and the source 12.
High breakdown voltage and low on-resistance are two important parameters desired by an LDMOS device. In order to have a lower on-resistance and smaller cell pitch, short channel is preferred. However, in prior art short channel approaches, short channel may lead to lower punch-through breakdown voltage which is one critical parameter for an LDMOS device.
In order to achieve higher punch-through breakdown voltage, one solution is to have a shallower source junction. But this might cause leakage if silicide formation in the later process consumes too much source region. Another solution is to rely on the body formation of the normal lateral Double Diffused MOSFET (DDMOS). But this requires high thermal budget which would affect the other junction profiles. For example, in Bipolar-CMOS-DMOS (BCD) semiconductor process, the high thermal budget in forming the body region of a conventional DDMOS device would affect the CMOS devices and bipolar transistors. It would also require a large cell pitch.
Accordingly, an LDMOS device is required to address some or all of the above deficiencies.